Photo by Lightsaber Collection on Unsplash. Source: https://unsplash.com/photos/qA-tTFNQyiI (Unsplash License). A technician inspects a rack of populated circuit boards on a production line.

Executive Summary

NVIDIA disclosed six capacity agreements on 21 October covering substrate, advanced packaging, test and optical engines, and it put money on the table for at least two of them. A $1.1bn capacity reservation advance goes to KYEC for new US test sites, and a multibillion dollar advance to IBIDEN funds the Ono plant in Japan. Substrate capacity across three suppliers rises 2.5 times in three years, Amkor adds more than 300 percent interposer wafer capacity by the end of 2028, and SPIL grows optical engine output for co-packaged optics 15 times by mid 2027.

The finding is that the NVIDIA supply chain is being financed by its largest customer rather than by the suppliers’ own balance sheets. Every date in the announcement is 2027 or 2028, so none of it adds a GPU to this year. The verdict is that the constraint has moved off the wafer and onto the parts around it, and the schedule for those parts is now bought with cash rather than negotiated with lead times.

NVIDIA is paying manufacturers before the parts exist. That’s the announcement, once the adjectives are gone.

Six partners, four chokepoints. IBIDEN, Samsung Electro-Mechanics and Unimicron make substrate, the small board that carries the package and fans its signals out. Amkor does advanced packaging, where the interposer sits under the die and the HBM stacks. KYEC tests, and SPIL builds the optical engines that let a rack of GPUs move data between them.

The bottleneck was never the die

A GPU is the easy part to describe. Wafer capacity is the number everyone quotes, and it’s the number least likely to be the binding constraint right now.

Substrate is a different animal. It’s built in dedicated facilities, its yields take quarters to tune, and the 2.5 times figure NVIDIA published covers three years, not three quarters. Samsung Electro-Mechanics is joining the substrate supply chain outright and will upgrade and build plants in Sejong and Busan. IBIDEN’s Ono plant targets three times current output, with new capacity ramping in the first quarter of 2028. Unimicron starts adding KF substrate capacity in the second quarter of 2027 and reaches full capacity by mid 2028.

Packaging is tighter still. Amkor’s target is more than 300 percent more interposer wafer capacity by the end of 2028. Read that as a statement about 2028 shipments, because there’s no honest way to read it otherwise.

Not one date on the list is 2026

Test capacity doubles from calendar 2026 to 2027, with new US volume in April 2027 and Singapore volume in February 2027. Substrate additions land in 2027 and 2028. Optics ramp through mid 2027 and double again by the end of 2028.

Four panel diagram of NVIDIA's 21 October 2026 capacity agre
Four suppliers, four multipliers, and the dates they land. Source, NVIDIA newsroom, 21 October 2026.

Meanwhile demand is being booked against capacity that doesn’t exist yet. Google Cloud said this week that it plans to scale Vera Rubin infrastructure to as many as 960,000 Rubin GPUs across multiple sites.

Put those two facts side by side and the next two years take shape. Buyers are committing to 2027 and 2028 delivery on infrastructure whose supply chain is still under construction. What decides whether the racks arrive isn’t the GPU allocation on the contract. It’s whether the interposer wafers and the optical engines were booked early enough by somebody upstream.

The advance payments are the part to notice. A capacity reservation advance isn’t a purchase order. It’s money handed over to fund equipment and buildings that produce parts later, and it turns a supply negotiation into a financing arrangement. At least two of the six carry one. If AI demand softens before those plants come up, whoever prepaid is holding the risk, and in its own supply chain that is NVIDIA.

The optics number is the one to watch

Fifteen times in roughly nine months is the largest relative jump in the announcement, and it’s on optical engines for co-packaged optics. Nobody grows a component line 15 times for a demonstration. A ramp that steep means the part is moving from a labelled feature into volume manufacturing.

Copper has a distance problem. Once a rack holds 72 or more accelerators and the fabric crosses them all, the electrical path costs power and signal integrity the power budget can’t absorb. Co-packaged optics moves the transceiver onto the package and shortens the electrical run. SPIL’s target says the supply chain now expects to make those in quantity, which is a different claim from expecting to demonstrate them.

Track the timing rather than the multipliers. A 15 times optics ramp finishing in mid 2027 sets the earliest date the next rack generation can ship at volume, and the substrate additions finishing in 2028 set when the volume behind it arrives. Suppliers are publishing the roadmap for AI capacity now, and their dates are the ones to put in your plan.

Three questions for your own plan. Which 2027 commitments depend on a part this announcement covers? What happens if a rack slides two quarters? And who on your team tracks substrate and optics capacity rather than GPU allocation?

The power side of the same problem is the queue a factory has to clear before it can be built, and the packaging bottleneck has its own American counterweight in GlobalFoundries. Neither problem is solved by shipping more dies.

By Ivan Tarin

Ivan Tarin is a Principal Product Marketing Manager at SUSE, where he owns go-to-market strategy and positioning for a seven-product cloud-native portfolio spanning Kubernetes, virtualization, storage, security, and observability. A former full-stack developer who shipped production code for enterprise and public-sector clients including U.S. national laboratories, Ivan translates complex infrastructure and AI technology into messaging that lands with developers, platform teams, and enterprise buyers. He has presented at KubeCon, SUSECON, and AWS Developer Week, and is currently pursuing an MS in Artificial Intelligence at the University of Colorado Boulder.

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